entity IQGainPhaseCorrection isgeneric(input_width:natural:=12; output_width:natural:=7);port( clk:in bit; x1:in bit_vector(input_width downto 0); y1:in bit_vector(input_width downto 0); gain_error:out bit_vector(output_width downto 0); phase_error:out bit_vector(output_width downto 0));end IQGainPhaseCorrection;architecture IQGainPhaseCorrection_beh of IQGainPhaseCorrection isbegin--as long as there are samples, do a loop correction : process is --local variables variable count_value : natural := 0; --phase error calculation variable reg_1:bit_vector(7 downto 0):=00000000; variable reg_1_sv:bit_vector(7 downto 0):=00000000; --gain error calculation variable reg_2:bit_vector(7 downto 0):=00000001; variable reg_2_sv:bit_vector(7 downto 0):=00000000; --SNR scaling? constant mu_1:real:=0.0002; constant mu_2:real:=0.0001; --Phase Offset Corrected variable y2:bit_vector(7 downto 0):=00000000; --Gain and Phase Offset Corrected variable y3:bit_vector(7 downto 0):=00000000; begin loop wait until clk; y2(nn) = y1(nn)-reg_1*x1(nn); reg_1_sv(nn) = reg_1; reg_1 = reg_1 + mu_1*x1(nn)*y2(nn);
y3(nn) = y2(nn)*reg_2; reg_2_sv(nn) = reg_2; reg_2 = reg_2+mu_2*(abs(x1(nn))^2 - abs(y3(nn))^2); end loop; end process correction;end IQGainPhaseCorrection_beh;Attached are the entity and architecture for the IQ Correction algorithm, as well as the original MATLAB model.I added a clock to the entity, and started the architecture. The architecture is "sketch" stage, but you can see where I'm going with it. Got some advice from Ken Easton on how to handle the types, and we're set to talk again about how best to handle memory. more soon! -Michelle W5NYV